Look what happens when someone starts his career in a then-new field and works at it for a long time!
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Kerry Veenstra’s U.S. Patents — As First Inventor
| Inventor(s) | Patent Number | Title |
|---|---|---|
| Veenstra | 4,677,318 | Programmable logic storage element for programmable logic devices |
| Veenstra | 5,359,242 | Programmable logic with carry-in/carry-out between logic blocks |
| Veenstra | 5,436,574 | Universal logic module with arithmetic capabilities |
| Veenstra | 5,486,775 | Multiplexer structures for use in making controllable interconnections in integrated circuits. |
| Veenstra | 5,517,186 | EPROM-based crossbar switch with zero standby power |
| Veenstra | 5,977,791 | Embedded memory block with FIFO mode for programmable logic device |
| Veenstra | 6,011,406 | Ultra-fast configuration mode for a programmable logic device |
| Veenstra | 6,242,946 | Embedded memory block with FIFO mode for programmable logic device |
| Veenstra | RE38,451 | Universal logic module with arithmetic capabilities |
| Veenstra, et al. | 5,680,061 | Techniques for programming programmable logic array devices |
| Veenstra, et al. | 6,160,419 | Programmable logic architecture incorporating a content addressable embedded array block |
| Veenstra, et al. | 6,286,114 | Enhanced embedded logic analyzer |
| Veenstra, et al. | 6,326,807 | Programmable logic architecture incorporating a content addressable embedded array block |
| Veenstra, et al. | 6,377,069 | Programmable logic device input/output architecture with power bus segmentation for multiple I/O standards |
| Veenstra, et al. | 6,460,148 | Enhanced embedded logic analyzer |
| Veenstra, et al. | 6,472,903 | Programmable logic device input/output architecture with power bus segmentation for multiple I/O standards |
| Veenstra, et al. | 6,525,678 | Configuring a programmable logic device |
| Veenstra, et al. | 6,605,960 | Programmable logic configuration device with configuration memory accessible to a second device |
| Veenstra, et al. | 6,704,889 | Enhanced embedded logic analyzer |
| Veenstra, et al. | 6,956,920 | Apparatus and method for low power routing of signals in a Low Voltage Differential Signaling system |
| Veenstra, et al. | 7,584,456 | Method and apparatus for debugging embedded systems having read only memory |
| Veenstra, et al. | 7,593,499 | Apparatus and method for low power routing of signals in a low voltage differential signaling system |
| Veenstra, et al. | 8,233,577 | Apparatus and method for routing of signals |
| Veenstra, et al. | 8,912,831 | Apparatus and method for routing of signals |
Kerry Veenstra’s U.S. Patents — As C0-inventor
| Inventors | Patent Number | Title |
|---|---|---|
| Allen, et al. | 7,000,161 | Reconfigurable programmable logic system with configuration recovery mode |
| Allen, et al. | 7,512,849 | Reconfigurable programmable logic system with configuration recovery mode |
| Allen, et al. | 7,822,958 | Booting mechanism for FPGA-based embedded system |
| Allen, et al. | 8,412,918 | Booting mechanism for FPGA-based embedded system |
| Bain, et al. | 7,472,369 | Embedding identification information on programmable devices |
| Cliff, et al. | 5,260,611 | Programmable logic array having local and long distance conductors |
| Cliff, et al. | 5,274,581 | Look up table implementation of fast carry for adders and counters |
| Cliff, et al. | 5,543,730 | Techniques for programming programmable logic array devices |
| Cliff, et al. | 5,850,151 | Programmable logic array intergrated circuit devices |
| Cliff, et al. | 5,850,152 | Programmable logic array integrated circuit devices |
| Cliff, et al. | 5,909,126 | Programmable logic array integrated circuit devices with interleaved logic array blocks |
| Cliff, et al. | 5,926,036 | Programmable logic array circuits comprising look up table implementation of fast carry adders and counters |
| Cliff, et al. | 5,963,049 | Programmable logic array integrated circuit architectures |
| Cliff, et al. | 5,982,195 | Programmable logic device architectures |
| Cliff, et al. | 6,191,608 | Techniques for programming programmable logic array devices |
| Cliff, et al. | 6,204,688 | Programmable logic array integrated circuit devices with interleaved logic array blocks |
| Cliff, et al. | 6,271,681 | PCI-compatible programmable logic devices |
| Cliff, et al. | 6,366,121 | Programmable logic array integrated circuit architectures |
| Cliff, et al. | 6,384,630 | Techniques for programming programmable logic array devices |
| Cliff, et al. | 6,392,438 | Programmable logic array integrated circuit devices |
| Cliff, et al. | 6,646,467 | PCI-compatible programmable logic devices |
| Cliff, et al. | 6,759,870 | Programmable logic array integrated circuits |
| Cliff, et al. | 6,815,981 | Programmable logic array integrated circuit devices |
| Cliff, et al. | 7,148,722 | PCI-compatible programmable logic devices |
| Cliff, et al. | RE35,977 | Look up table implementation of fast carry arithmetic and exclusive-or operations |
| Lane, et al. | 6,069,487 | Programmable logic device circuitry for improving multiplier speed and/or efficiency |
| Lane, et al. | 6,323,677 | Programmable logic device circuitry for improving multiplier speed and/or efficiency |
| Lytle, et al. | 6,181,162 | Programmable logic device with highly routable interconnect |
| Lytle, et al. | 6,294,928 | Programmable logic device with highly routable interconnect |
| Lytle, et al. | 6,492,834 | Programmable logic device with highly routable interconnect |
| Ngo, et al. | 7,310,757 | Error detection on programmable logic resources |
| Ngo, et al. | 7,577,055 | Error detection on programmable logic resources |
| Ngo, et al. | 7,907,460 | Error detection on programmable logic resources |
| Ngo, et al. | 8,130,574 | Error detection on programmable logic resources |
| Norman, et al. | 4,864,161 | Multifunction flip-flop-type circuit |
| Pedersen, et al. | 5,260,610 | Programmable logic element interconnections for programmable logic array integrated circuits |
| Pedersen, et al. | 5,376,844 | Programmable logic device with multiplexer-based programmable interconnections |
| Pedersen, et al. | 5,436,575 | Programmable logic array integrated circuits |
| Pedersen, et al. | 5,485,103 | Programmable logic array with local and global conductors |
| Pritchard, et al. | 7,395,360 | Programmable chip bus arbitration logic |
| Reddy, et al. | 6,052,327 | Dual-port programmable logic device variable depth and width memory array |
| Reddy, et al. | 6,392,954 | Dual port programmable logic device variable depth and width memory array |
| Van Brink, et al. | 7,802,221 | Design tool with graphical interconnect matrix |
| Van Brink, et al. | 8,191,035 | Design tool with graphical interconnect matrix |
| Xia, et al. | 7,356,620 | Apparatus and methods for communicating with programmable logic devices |
| Xia, et al. | 7,574,533 | Apparatus and methods for communicating with programmable logic devices |
| Xia, et al. | 7,650,438 | Apparatus and methods for communicating with programmable logic devices |
| Xia, et al. | 8,719,458 | Apparatus and methods for communicating with programmable logic devices |
| Xia, et al. | 8,190,787 | Apparatus and methods for communicating with programmable logic devices |
| Xia, et al. | 8,554,959 | Apparatus and methods for communicating with programmable logic devices |
| Xia, et al. | 9,274.890 | Apparatus and methods for communicating with programmable devices |